In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime (post-boot) cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data.
History

Tue, 10 Jun 2025 16:15:00 +0000

Type Values Removed Values Added
Metrics ssvc

{'options': {'Automatable': 'no', 'Exploitation': 'none', 'Technical Impact': 'partial'}, 'version': '2.0.3'}


Tue, 10 Jun 2025 00:15:00 +0000

Type Values Removed Values Added
Description In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime (post-boot) cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data.
Weaknesses CWE-497
CWE-682
CWE-772
CWE-940
CWE-941
References
Metrics cvssV3_1

{'score': 3.2, 'vector': 'CVSS:3.1/AV:L/AC:L/PR:L/UI:R/S:C/C:L/I:N/A:N'}


cve-icon MITRE

Status: PUBLISHED

Assigner: AMD

Published: 2025-06-09T23:57:39.748Z

Updated: 2025-06-10T15:27:43.315Z

Reserved: 2024-11-21T16:18:02.918Z

Link: CVE-2025-0036

cve-icon Vulnrichment

Updated: 2025-06-10T14:19:47.545Z

cve-icon NVD

Status : Awaiting Analysis

Published: 2025-06-10T00:15:21.197

Modified: 2025-06-12T16:06:39.330

Link: CVE-2025-0036

cve-icon Redhat

No data.